Connect FCM interface to FCB

From RCSWiki

Create FCM IP Core on FCB

Note1: Here a double precision floating point unit is used as an example of user IP core.

Since the FCM is connected to FCB, and Xilinx Create and Import Peripheral Wizard only allow you to create IP core that connects to PLB, FSL or OPB, so you need to create your FCM core manually:

1. Make some new folders in pcores/ directory as following example shows:
   • Fcm_v1_00_a/
     • data/
     • hdl/
       • vhdl/
     • netlist/
2. Copy and paste the Media: fcm.vhd file into pcores/fcm_v1_00_a/hdl/vhdl/ directory.
3. Copy and paste the Media: fcm v2 1 0.mpd file to pcores/fcm_v1_00_a/data/ directory.
4. Click Project--> Rescan User Repositories, you will find Fcm user IP core in Project Local pcores.
5. Add the new Fcm IP core to the system.

Connect Ports to Signals

• Connect the Fcm IP core to FCB as the following figure shows:

• Most of the ports and signals are connected and described in MPD file, however you still need to connect the FCB_CLK, SYS_RST ports of FCB and clock port of FCM to certain signals manually.

• Comes to Ports, and map signals to ports as the following figure shows:

Now you have Fcm interface in your system. Let's continue on to the Implement userlogic to FCM interface