###################################################################
##
## Name     : fcm
## Desc     : FCM module for FCM Load & Store instructions
##
###################################################################

##############################################################################
#
#     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
#     SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR
#     XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION
#     AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION
#     OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS
#     IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
#     AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
#     FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY
#     WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
#     IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
#     REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
#     INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
#     FOR A PARTICULAR PURPOSE.
#     
#     (c) Copyright 2005 Xilinx, Inc.
#     All rights reserved.
#
##############################################################################

BEGIN fcm

## Peripheral Options
OPTION IPTYPE = PERIPHERAL
OPTION IMP_NETLIST = FALSE
OPTION SIM_MODELS = BEHAVIORAL
##OPTION IP_GROUP = LOGICORE
OPTION ARCH_SUPPORT_MAP = (virtex2p=PREFERRED, aspartan3=PREFERRED, spartan3=PREFERRED, spartan3an=PREFERRED, spartan3a=PREFERRED, spartan3e=PREFERRED, spartan3adsp=PREFERRED, virtex4lx=PREFERRED, virtex4sx=PREFERRED, virtex4fx=PREFERRED, virtex5lx=PREFERRED, virtex5sx=PREFERRED, virtex5tx=PREFERRED, virtex5fx=PREFERRED, aspartan3e=PREFERRED, aspartan3a=PREFERRED, aspartan3adsp=PREFERRED, qvirtex4lx=PREFERRED, qvirtex4sx=PREFERRED, qvirtex4fx=PREFERRED, qrvirtex4lx=PREFERRED, qrvirtex4sx=PREFERRED, qrvirtex4fx=PREFERRED)
OPTION HDL = VHDL
OPTION STYLE = MIX

## Bus Interfaces
BUS_INTERFACE BUS = SFCB, BUS_STD = FCB, BUS_TYPE = SLAVE

## Ports
PORT FCMAPUINSTRACK = Sl_INSTRACK, DIR = OUT, BUS = SFCB 
PORT FCMAPURESULT = Sl_RESULT, DIR = OUT, VEC = [0:31], BUS = SFCB
PORT FCMAPUDONE = Sl_DONE,DIR = OUT, BUS = SFCB 
PORT FCMAPUSLEEPNOTREADY = Sl_SLEEPNOTREADY, DIR = OUT, BUS = SFCB 
PORT FCMAPUDECODEBUSY = Sl_DECODEBUSY, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDGPRWRITE = Sl_DCDGPRWRITE, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDRAEN = Sl_DCDRAEN, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDRBEN = Sl_DCDRBEN, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDPRIVOP = Sl_DCDPRIVOP, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDFORCEALIGN = Sl_DCDFORCEALIGN,DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDXEROVEN = Sl_DCDXEROVEN, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDXERCAEN = Sl_DCDXERCAEN, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDCREN = Sl_DCDCREN,DIR = OUT, BUS = SFCB 
PORT FCMAPUEXECRFIELD = Sl_EXECRFIELD, DIR = OUT, VEC = [0:2], BUS = SFCB
PORT FCMAPUDCDLOAD = Sl_DCDLOAD, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDSTORE = Sl_DCDSTORE, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDUPDATE = Sl_DCDUPDATE, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDLDSTBYTE = Sl_DCDLDSTBYTE, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDLDSTHW = Sl_DCDLDSTHW, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDLDSTWD = Sl_DCDLDSTWD, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDLDSTDW = Sl_DCDLDSTDW, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDLDSTQW = Sl_DCDLDSTQW, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDTRAPLE = Sl_DCDTRAPLE, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDTRAPBE = Sl_DCDTRAPBE, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDFORCEBESTEERING = Sl_DCDFORCEBESTEERING, DIR = OUT, BUS = SFCB 
PORT FCMAPUDCDFPUOP = Sl_DCDFPUOP, DIR = OUT, BUS = SFCB 
PORT FCMAPUEXEBLOCKINGMCO = Sl_EXEBLOCKINGMCO, DIR = OUT, BUS = SFCB 
PORT FCMAPUEXENONBLOCKINGMCO = Sl_EXENONBLOCKINGMCO, DIR = OUT, BUS = SFCB 
PORT FCMAPULOADWAIT = Sl_LOADWAIT, DIR = OUT, BUS = SFCB 
PORT FCMAPURESULTVALID = Sl_RESULTVALID, DIR = OUT, BUS = SFCB 
PORT FCMAPUXEROV = Sl_XEROV, DIR = OUT, BUS = SFCB 
PORT FCMAPUXERCA = Sl_XERCA, DIR = OUT, BUS = SFCB 
PORT FCMAPUCR = Sl_CR, DIR = OUT, VEC = [0:3], BUS = SFCB
PORT FCMAPUEXCEPTION = Sl_EXCEPTION, DIR = OUT, BUS = SFCB 

PORT APUFCMINSTRUCTION = FCB_INSTRUCTION, DIR = IN, VEC = [0:31], BUS = SFCB
PORT APUFCMINSTRVALID = FCB_INSTRVALID, DIR = IN, BUS = SFCB 
PORT APUFCMRADATA = FCB_RADATA, DIR = IN, VEC = [0:31], BUS = SFCB
PORT APUFCMRBDATA = FCB_RBDATA, DIR = IN, VEC = [0:31], BUS = SFCB
PORT APUFCMOPERANDVALID = FCB_OPERANDVALID,  DIR = IN, BUS = SFCB 
PORT APUFCMFLUSH = FCB_FLUSH, DIR = IN, BUS = SFCB 
PORT APUFCMWRITEBACKOK = FCB_WRITEBACKOK, DIR = IN, BUS = SFCB 
PORT APUFCMLOADDATA = FCB_LOADDATA, DIR = IN, VEC = [0:31], BUS = SFCB
PORT APUFCMLOADDVALID = FCB_LOADDVALID, DIR = IN, BUS = SFCB 
PORT APUFCMLOADBYTEEN = FCB_LOADBYTEEN, DIR = IN, VEC = [0:3], BUS = SFCB
PORT APUFCMENDIAN = FCB_ENDIAN, DIR = IN, BUS = SFCB
PORT APUFCMXERCA = FCB_XERCA, DIR = IN, BUS = SFCB 
PORT APUFCMDECODED = FCB_DECODED, DIR = IN, BUS = SFCB
PORT APUFCMDECUDI = FCB_DECUDI, DIR = IN, VEC = [0:2], BUS = SFCB
PORT APUFCMDECUDIVALID = FCB_DECUDIVALID,  DIR = IN, BUS = SFCB
PORT clock = "", DIR = IN, SIGIS = CLK
PORT reset = FCB_RST, DIR = IN, BUS = SFCB

END